Feedback
First time here?
Take a Tour in This Page
Start Tour
en

Digital Implementation Engineer 2018-Apr-16

Cairo , EGYPT | Information technology | Engineering | Telecommunication
Job type:

Full time

Experience :

3 -5 years

Job description :

Develop and execute detailed block-level and chip-level digital designs.  Write and verify RTL code (Verilog/VHDL) for digital sub-systems of system-on-a-chip (SOC).  Synthesis of RTL code.  Run static timing verification on the gate-level netlist with parasitics  Writing test plans and test-bench development.  Generation of required documentation and contribution to the validation and debugging of the fabricated silicon. Required Skills  3-5 BS or MS in Electrical Engineering with background in CMOS ASIC/FPGA design  Design and verification experience at the RTL and gate-level (Verilog/VHDL)  Experience with synthesis tools  Working knowledge of Cadence’s and Mentor IC design and verification tools on (NC–SIM, AMS-designer, ModelSim, etc).  Knowledge of high speed and low power digital design techniques  Strong documentation, communication, and presentation skills.  Excellent problem solving and analytical skills.  Should have experience with team building, process improvement, conflict resolution, and motivating people.  Knowledge of P&R and DFT tools is a plus. Qualifications  Sc. in Electronics Engineering.  Excellent communications skills.  Ability to work independently as well as a key team player.  Oral and written fluency in Eng

Candidate information:

Gender :

Any

Age :

28 -33 years

Skills required :

--

Languages :

English | Excellent

Benefits & allowances:

Salary:

Negotiable

Apply Now :

send messageApply Now

Share it: